A 40-Gbit/s-class universal logic interfacer IP using GaAs HBTs for heterogeneous logic/device systems in package

A 40-Gbit/s-class ECL/SCFL-to-LVCMOS/LVDS universal logic interfacer IP was developed using production-level GaAs HBTs for use in a heterogeneous logic/device system in package (SiP). A unique co-design concept based on the flat and modular IP configurations was introduced to make ease of seamless/universal interconnection with reduced design/test costs. The test chip demonstrated excellent universal level-transform functions with a small power-delay product of less than 2.8 pJ.