Resource allocation and delay constraints in ATM networks

The authors review the architecture of a typical asynchronous transfer mode (ATM) switch and consider the problem of handling both continuous bit-oriented and bursty traffic with low-loss and delay requirements. The authors examine six different approaches to handling mixed traffic in an ATM switch, and compare their performance by means of simulation. A switch architecture which distinguishes among three traffic types with a shared buffer turns out to have the best performance, where performance means the ability of the switch to provide the quality of service (loss and delay) desired by each application at minimum expense.<>