A genetic algorithm for the rectilinear Steiner tree in 3-D VLSI layout design

As manufacturing technology has advanced in recent years, 3-D ICs in which circuits are piled on top of each other have been the focus of attention. A rectilinear Steiner minimum tree is one of the most important problems in the layout design of VLSI. This paper proposes a genetic algorithm for the rectilinear Steiner minimum tree with consideration of the diameter in 3-D VLSI layout design. The experimental results are also shown.