An RF sampling downconversion filter for a receiver front-end

An integrable front-end architecture for WLAN applications in the 2.4 GHz band is described in this paper. It is based on a multi-functional switched-capacitor block, which performs RF sampling, quadrature downconversion to IF, tunable IF filtering, downconversion to baseband, and sampling rate decimation. The proposed RF sampling downconversion filter is designed in a 0.18-/spl mu/m CMOS technology. In the downconverted channel band the anti-alias suppression is more than 26 dB. The signal gain is 8 dB, the noise figure is 22 dB, and the IIP/sub 3/ is at +11 dBm. The image rejection is better than 66 dB. Without the clock generation block the sampling mixer and downconversion filter consume 2.9 mW power.