The revolutionary and truly 3-dimensional 25F/sup 2/ SRAM technology with the smallest S/sup 3/ ( stacked single-crystal Si) cell, 0.16um/sup 2/, and SSTFT (atacked single-crystal thin film transistor) for ultra high density SRAM

The smallest 25F/sup 2/ SRAM cell size of 0.16um/sup 2/ is realized by S/sup 3/ cell technology and SSTFT with 193nm ArF lithography process. The stacked single-crystal thin film is developed and used for the first time in the SRAM cell to make the SRAM products comparative to the DRAM products in the density and the cost. The load PMOS and pass NMOS transistors are stacked over the planar pull-down NMOS transistors to drastically reduce the cell size. In this study, the dream of truly 3D memory device is achieved by fabricating 64M bit density SRAM.