Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits

In this paper we present a new proposal for implementing a voltage-mode Multiple-Valued (MV) maximum or minimum function. The circuit has been implemented using Recharged Semi Floating-Gate (SFG) transistors. The benefit with this design is, the proposed circuits can easily be fabricated using a conventional CMOS process. The circuit is suitable for a low power design, V/sub dd/<2 volt. It has high noise margin and good linearity. The simulation results for the proposed circuit are evaluated using AMS 0.35 /spl mu/m CMOS device parameters.