Comparison of quasi-/pseudo-floating gate techniques

Recently, the quasi- or pseudo-floating gate (QFG) technique has been suggested by several authors to implement many of the functions of the widely used floating-gate MOS transistors technique by using ultra-high resistances to isolate a floating node. Several different ways have been suggested to implement these quasi-infinite resistors (QIRs). In this paper, several basic QIR structure are analyzed and compared, and three sources of error, dc offset, signal distortion, and signal-dependent offset, are defined. Then, through simulations and experiments, the suitability of several QIR implementations for use in various applications is compared. One implementation is shown to minimize dc offset, but voltage swing is limited to less than 0.7 V/sub pp/. Configurations using parallel connections of QIRs improve signal distortion and signal-dependent offset, but still suffer from dc offset and limited voltage swing. Series-connected QIR structures allow increased voltage swings, but typically lead to hard-to-predict offsets of up to few hundred mV because of well-substrate leakage currents. Other circuits are also analyzed.