Digital design guidelines for high speed backpanel interconnect

Some general guidelines for the design and construction of high-speed digital backpanels using microstrip transmission lines and ALS, FAST, or CMOS logic are presented. These guidelines are intended to give a designer a better idea of the factors that cause transmission-line problems on digital backpanels and provide possible methods to correct these problems. Specifically, general guidelines to assist in reducing problems of crosstalk, metastate, and reflects are presented. The guidelines were derived by linear and nonlinear simulations of many permutations of physical and electrical designs.<>