Snubber design approach for dc-dc converter based on differential evolution method

The design of snubber circuits for MOS-FET low power dc-dc converters are presented in this paper. Experimental evaluation is proposed for the analyses and the design procedure. The appropriate design of the snubber circuit can increase the power range, or decrease total power dissipation of the low-power dc-dc converters available as integrated circuit. The evaluation of snubber circuit is based on experimental results. Currents and voltages wave-shapes were approximated by the continuous functions. Total energy dissipation functions were determined as well. For calculation of approximation coefficients the method based on differential evolution algorithm has been used. Proposed method enables that the power transistor dissipation decrease by almost 30% in the case that the efficiency of converter not changes. Benefits, drawbacks and limits of the proposed approach are detailed and studied. Experimental results, obtained from laboratory prototype of boost converter are reported as well.