A nonlinear simulation model of integrated Hall devices in CMOS silicon technology

A new simulation model for Hall devices in CMOS silicon technology is proposed. Nonlinearities caused by effects, as back-bias and vertical field-effect, transient effects caused by parasitics and wide operational range in temperature were taken into account and implemented in VHDL-AMS. Behavioral equations and parameters are based in fundamental theory of Hall devices and semiconductor physics and verified experimentally. Comparisons between simulation and measured behavior of productive ICs were done to prove the correctness and completeness of the implemented set of equations and high accuracy of this model. To distinguish the benefits of the proposed model, simulations with the current Hall models are done with the same setups.