Monolithic time-to-digital converter with 20ps resolution

We present a fully-integrated time-to-digital converter, in a standard 0.8/spl mu/m-CMOS technology, based on a cyclic pulse-shrinking design, that provides the lowest channel width of 20ps ever reported in literature for a single-shot measurements performed by monolithic circuits, with differential linearity errors lower than 10ps (less than 0.5LSB), conversion time shorter than 20/spl mu/s, and 18ns full-scale-range.