A SOC for multimedia network devices

Two main aspects of multimedia SoC are addressed in this paper. First, a multiprocessor system employing reconfigurable hardware blocks with coarse and fine grain structures is introduced. It alleviates the tradeoff between computing performance and circuit flexibility for a wide range of applications. Second, a clock generator for synchronous audio and video interfaces is presented. In order to provide high portability and compatibility with the digital design flow it consists of digital standard cells only. Integrated on a 0.25 /spl mu/m CMOS process, the system occupies 25 mm/sup 2/ and operates at 100 MHz. Computation speedup of up to factor 9.7 over stand-alone CPU solutions could be achieved. The clock generator runs at 200 MHz and provides a frequency resolution of 0.06 ppm with an expected output jitter of less than 30 ps; RMS.