Reconfigurable processor architectures for mobile phones

This paper describes a new dynamically configurable system-on-chip (CSoC) concept and integration, consisting of an ARM7 EJS processor-core, a coarse-grain 4/spl times/4 XPP-array from PACT XPP Technologies AG, and application-tailored global/local memory topology with efficient Amba-based communication interfaces. The system and introduced CSoC architecture is optimized for the mobile communication algorithm scenario. The paper gives an overview of the overall system concept, the hardware datapath structures and their integration as well as discussing some selected application implementation results within this target area.