A low power charge sharing ROM using dummy bit lines

This paper proposes a shared-capacitor charge-sharing ROM (SCCS-ROM). The SCCS-ROM reduces the swing voltage using the charge-sharing technique of the charge-sharing ROM (CS-ROM). Although the CS-ROM needs three small capacitors per output, the SCCS-ROM shares the capacitors so that it needs only three capacitors. The SCCS-ROM implements the capacitors using dummy bit lines. This not only increases noise immunity but also reduces power. The simulation results, using 0.35 /spl mu/m CMOS technology, show that the SCC-SROM reduces power by 8.4% compared to the CS-ROM.