Novels clean methodology to improve GOI performance of high voltage device

Dual gate technology is widely used on high voltage products. Therefore, the treatment on dual gate oxide loop is very critical. Unfortunately, some troubles happened at dual gate oxide loop process. Photoresist peeling and poor uniformity on LV gate oxide thickness were the major troubles on this loop. The intention of this report is to provide an optimized clean procedure at dual gate oxide loop for 0.35 HV device and improves GOI performance.