A combined test structure with ring oscillator and inverter chain for evaluating optimum high-speed/low-power operation

A test structure combined with a ring oscillator, an inverter chain and an embedded monitor inverter, which allows accurate internal node access, is proposed. V/sub dd/ and well-bias dependence of gate delay and supply current measured by both ring oscillator and inverter chain scheme. V/sub T/ control method by well biasing, particularly to forward direction, is effective for high speed operation under low supply voltage. The new test structure can be utilized to evaluate optimum conditions for high-speed/low-power operations as well as high-reliability operations.