Macromodeling with SPICE for the voltage breakdown behavior in bipolar junction and field-effect transistors

This paper presents two macromodels using SPICE primitives to simulate the static current-voltage (I-V) output characteristics of bipolar junction and field-effect transistors (BJTs and FETs) with the collector-emitter and drain-source breakdown voltages taken into account. Both macromodels use a reverse biased diode and a resistor in series with a current-controlled or voltage-controlled voltage source. A practical circuit adopting the macromodel for the BJT (MPSA06) illustrates the voltage-clamped features.