Extraction of electrical parameters of floating gate devices for circuit analysis, simulation, and design

We propose a structured methodology to extract the electrical parameters of floating gate devices. The characterization of a FG structure requires only two parameters in addition to the conventional MOSFET parameters. This additional set of parameters represents the charge on the FG and the total capacitive coupling of the FG with the control gate. We have characterized the FG device through a comparison of its characteristics with those of a reference transistor. Then we used analytical and simulation MOSFET models in conjunction with the extracted parameters to show the validity of our approach. Our methodology can be applied for the characterization of both flash memories and multiple-input FG devices. Both analytical and simulation models are shown to be in good agreement with experimental results in a 0.35 /spl mu/m CMOS technology.