A very high-frequency CMOS self-biasing complementary folded cascode differential difference current conveyor with application examples

In this paper a very high-frequency CMOS configuration for differential difference current conveyor (DDCC) based on self-biasing complementary folded cascode (CFC) circuit is proposed. The circuit uses no additional bias voltage sources other than the two supply rails. In addition, DDCC-based four novel first order all-pass configurations are presented as an example of application of the proposed CMOS DDCC circuit. Simulation results are included to verify the theory.