A highly linear CMOS amplifier for Variable Gain Amplifier applications

This paper reports the design of a highly-linear CMOS amplifier for Variable Gain Amplifier (VGA) applications. A better than -60 dB 3rd harmonic distortion at differential output level of 1 V peak-to-peak is obtained by utilizing a linearization scheme that does not rely on the active devices. The amplifier maintains 3 dB bandwidth over 300 MHz. A noise figure at 8.6 dB is obtained with source impedance of 200 ohms. It is implemented in standard CMOS 0.25 u process and consumes 40 mA current under 3.3 V power supply.