Speech interface ASIC of SOC architecture for embedded application

We have developed a speech interface ASIC of SOC architecture for embedded application, with speech recognition and speech compression/decompression functions. The ASIC contains not only a MCU core, a DSP core and two codecs (coder/decoder), but also the input and output analog channels, which makes it a complete system on a chip that can form a whole application without any other chips. We have provided with full speech interface functions of guidance prompt, speech playback and small vocabulary to medium vocabulary speaker dependent/independent recognition. The DSP executes speech compression/decompression as well as acoustic analysis and speech recognition computation, while the MCU works as a CPU of the whole ASIC in charge of control and communication. The software system is organized at two levels $the application level and the service level. With our service modules, any new application software can be quickly built up. This speech interface ASIC can perform 100 phrases speaker dependent recognition or 300 phrases speaker independent recognition within 0.3 second and the recognition accuracy reaches more than 96%. It also meets the speech interface demands of embedded application, and can offer a good solution for size, power-consumption, cost, reliability and performance.