Silicon-rich-oxides as an alternative charge-trapping medium in Fowler-Nordheim and hot carrier type non-volatile-memory cells

We present a study on memory cells consisting of a standard MOSFET with a Silicon-Rich-Oxide (SRO) charge-trapping layer incorporated in the gate-dielectric stack. The impact of excess-silicon concentration and tunnel-oxide thickness on basic cell characteristics of both Fowler-Nordheim and hot-carrier type of devices is investigated. We employ a new technique for high-speed determination of the threshold voltage, demonstrate the possibility of 2-bit storage and analyze the Vt-fluctuations in matched transistor pairs.