Low power, low voltage, 10bit-50MSPS pipeline ADC dedicated for front-end ultrasonic receivers

This paper concerns the design and the implementation of a low power, low voltage 10bit-50MS/s pipeline analog to digital converter (ADC) dedicated to ultrasonic receivers. The ADC is used in the front-end stage to convert the signals coming from the time gain compensator (TGC) of the handheld ultrasonic apparatus. The proposed architecture is based on 1.5 bits per stage pipeline structure followed by a digital offset compensation to relax the constraints on the analog circuitry. The converter is implemented in digital CMOS 0.18 /spl mu/m technology, the circuit occupies an active area of 1.2 mm/sup 2/, the input differential voltage dynamic range is chosen to be 1.6 Vpp and the power consumption is found to be 31 mW from 1.8 V supply.