A 1.5V multigigahertz CMOS tunable image reject notch filter

This paper presents a new RF notch filter topology for image rejection in heterodyne receivers. The circuit is combined with a cascode low noise amplifier (LNA) and an output buffer for testing purposes. It is implemented with standard CMOS 0.18/spl mu/m technology. The notch filter is tunable from 10.5 to 11.1GHz. Up to 10dB controllable gain is obtained from the LNA in the pass band at 6.5GHz. A -50dB image rejection is realized by using on chip inductor Q-factor enhancement techniques. At the maximum in band gain of 12dB and -50dB image rejection, the circuit consumes 22mW of power with a noise figure of 2.4dB, a -12.5dB IIP3, from a 1.5V power supply.