Thin-film memory drive and sense techniques for realizing a 167-Nsec read/write cycle

THIS PAPER will describe the design goals, final design criteria and performance of the addressing and sensing circuits for a 6-Mc, 128-word, 48-bit, random-access, magnetic-film memory. Previous designs, suitable for operation in a slower magnetic-film memory *1,2 were not readily expandable, or desirable, for incorporation into higher-speed equipment. For the realization of magnetic-film memory interface circuits capable of functioning at 167-nsec cycle times, some original concepts were required.