High performance, MOS EPROMs using a stacked-gate cell

A HIGH PERFORMANCE 8192-BIT Erasable PROM has been developed in response to the increasing requirements or” second generation microprocessors. The design goals of density and speed have been achieved through the development of an N-channel stacked-gate cell combined with novel peripheral circuits. The small cell size (1 mil2) and fast memory access (450 ns max) extend EPROM performance beyond the levels established by the well known P-channel approach.