Realization of extensions to Faddeev algorithm on array of SIMD processors

Vertical, horizontal, and two-dimensional extensions are presented for the new Faddeev-algorithm-based systolic architecture for matrix computations presented by H.V.D. Le and M.A. Perkowski (Proc. Int. Con. on Computing and Informati ICCI '89, Ontario, Canada, 1989). It has essential advantages over previous architectures of this type and finds various applications. Extensions to the Faddeev algorithm can be used in many problems, including the Karmarkar algorithm. The extensions described not only increase system throughput by two to fourfold but also enhance the inherent programmability of Faddeev's algorithm. This allows the architecture to perform very complex matrix calculations.<>