A parallel algorithm for solving nonlinear networks

An efficient algorithm has been developed for analyzing nonlinear electronic networks. The algorithm generates a signal-flow graph for any electronic network with no restrictions on topology or types of nonlinearities. The network can be configured on a system of parallel processors, resulting in a very efficient algorithm. The basic algorithm suffers from instabilities under certain conditions, and a method of ensuring stability is described. Examples are given of nonlinear networks analyzed on a system of parallel processors.<>