A Multi-Level Pseudo-Resonant Switched-Capacitor Gate Drive IC with Sub-Nanosecond Step Tuning

This work presents a highly-integrated switched-capacitor gate drive integrated circuit (IC) that can provide tunable multi-step driving of the gate voltage waveform. By using flying capacitors to deliver and recovery the gate energy, hard-charging loss can be reduced by roughly the number of steps of the SC converter. The tuned multi-level operation can also leverage parasitic gate-loop inductance to further reduce gate drive loss while preventing ringing and overshoot of the gate voltage. The proposed driver, implemented in 130nm SOI CMOS, achieves per-step timing resolution below 50 ps and multiplies the single 1.0 V power supply to $\sim$5 V_pp, suitable for a range of low-R_DSon GaN and silicon power devices. Measured results show the design can achieve comparable gate and drain slew rates to conventional gate drivers while reducing power consumption by 2-7× for a range of loop impedance and gate charge.