Analog Signal Mixer Using SAR ADC

Analog signal multiplication is a fundamental operation in various domains, including communications, control systems, and signal processing. This paper presents a novel approach for performing efficient and precise analog signal multiplication using a Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC), designed using a Verilog-A environment. The proposed method harnesses the capabilities of SAR ADCs to digitize analog signals and carry out multiplication in the digital domain, eliminating the inherent complexities and power inefficiencies associated with traditional analog multipliers. The mixer circuit using a SAR ADC demonstrates wide bandwidth capabilities, efficiently handling input frequencies from 1 KHz to 7 MHz with varying delays and amplitude responses. Lower delays at higher frequencies (80 ns to 158 ns) and higher output amplitudes at low frequencies (up to 0.110 V) indicate the circuit's efficiency in processing high-speed and low-frequency signals. These characteristics result in versatile applications such as audio mixing and low-frequency signal processing.