Emerging Neuromorphic Devices-Compatible SNN Hardware With Adaptive STDP and Validation Using Novel CMOS Neuron-Synapse Circuits

This study proposes a neuromorphic hardware system based on a spiking neural network (SNN). The circuit-level adaptability of the system enables the integration of diverse emerging neuromorphic neuron and synaptic devices into a single system. The proposed design includes a spike-timing-dependent plasticity (STDP) generator for pulse-based STDP learning and a spike regenerator that reshapes neuron spike signals. These blocks enable adaptable circuit adjustment based on varying emerging neuromorphic device conditions. Considering the instability of emerging neuromorphic devices, this study also implements neuron and synapse circuits based on complementary metal–oxide semiconductors (CMOSs). These circuits emulate the essential behaviors of target devices and can support the proposed STDP learning mechanism. System functionality was validated through a pattern classification task using a $10\times 3$ array with CMOS-based neurons and synapses, demonstrating both learning and inference capabilities. The proposed architecture eliminates the need for large-area analog components, such as analog-to-digital converters, digital-to-analog converters, and external microcontrollers, by adopting a column-shared structure, which ensures power-efficient scalability with an increase in the number of pre-neurons. Consequently, the system enables compact, energy-efficient neuromorphic implementation.