A TID-Hardened CMOS Bandgap Reference Circuit Design

This paper presents a radiation-hardened bandgap reference (BGR) circuit designed to tolerate Total Ionizing Dose (TID) effects under standard CMOS process. By introducing a current-negative feedback mechanism consisting of a voltage drift detector, transconductance amplifier and current subtractor, the proposed design achieves automatic compensation for voltage drifts induced by TID effects. The compensated architecture exhibits strong radiation resistance while maintaining temperature stability across typical process corners. Simulation results show that the typical temperature coefficient is as low as $2.625-2.958 \mathrm{ppm} /{ }^{\circ} \mathrm{C}$ at the TT process corner. The output voltage drift at the TT process corner is as low as 12.3 mV at room temperature after a radiation dose of $\mathbf{4 0 0 ~ k r a d}$. This represents an $\mathbf{8 2 \%}$ reduction in voltage drift relative to before the radiation.