Comprehensive Variation Analysis of Domain Number and Write Pulse in NLS Theory-Based Ferroelectric Field-Effect Transistors

Ferroelectric field-effect transistors (FeFETs) have emerged as promising building blocks for next-generation non-volatile memory and logic devices, owing to their unique combination of CMOS compatibility, ultra-low standby power, fast switching speed, and high scalability. However, their practical deployment is hindered by device-to-device variation arising from the stochastic switching behavior of ferroelectric domains, especially in polycrystalline films. This work establishes a physics-informed compact modeling framework with nonlinear screening effects, coupled with Monte Carlo analysis, to systematically evaluate the impact of domain number ($N_{\text {Dom }}$), programming voltage amplitude ($V_{\mathrm{amp}}$), and pulse width ($T_{\mathrm{Pw}}$) on FeFET variability. Simulation results show that increasing Ndom substantially suppresses variability in the memory window, while appropriate tuning of Vamp and TPW further reduces threshold voltage fluctuation. These insights offer valuable guidelines for optimizing FeFET design and operation, providing a foundation for future advancements in reliable and scalable nonvolatile memory systems.