A Efficient Reed-Solomon Codes Recognizer Based on Galois Field Fourier Transform

The blind recognition technology for Reed-Solomon (RS) codes has been widely applied in scenarios such as noncooperative communications. However, the high latency and significant hardware resource consumption caused by numerous iterative operations limit the development of hardware implementations for the recognizer. This paper presents an half Galois field Fourier transform (H-GFFT) algorithm with a calculation complexity of $(n-1)/2$ compared to the traditional GFFT. Furthermore, a multi-path parallel circuit architecture suitable for H-GFFT is proposed, which effectively reduces calculation latency. Building on this, a hardware design for a recognizer that can identify the length and rate of RS codes has been completed, which has been implemented on the Xilinx KC705 FPGA development platform. Experimental results indicate that the recognition performance of the recognizer approaches the theoretical recognition limit, with a hardware acceleration ratio of 188.22.