A D-Band 6-bit Bi-directional Variable Gain Phase Shifter With 1.3°/0.2 dB RMS Phase/Gain Errors in 40 nm Bulk CMOS for 6G Communications

This article demonstrates a $D$ -band bi-directional variable gain phase shifter (Bi-VGPS), adopting a novel phase-compensated vector modulation array (PC-VMA) to compress the phase-invariant in the gain-tuning mode selection under digital controls. To address the large phase deviation of the classic transistor array in the gain-tuning mode selection especially at higher frequencies, a stair-like quasi-zero-impedance transmission line based PC-VMA is utilized to compensate the phase invariants, which ensures the phase consistency of the asymmetric I/O ports of each transistor in arrays and subsequently reduces the RMS phase/gain errors in the bi-directional operation. The Bi-VGPS comprises a coupled-line-based hybrid coupler, four compensated enhanced edge-coupling baluns, a Wilkinson power combiner, and two PC-VMAs. A proof-of-concept Bi-VGPS is implemented in 40-nm bulk CMOS technology, occupying a core area of 0.19mm ${}^{\mathbf {2}}$ and consuming zero DC power. Measurement results show that the circuit features a 6-bit 360° phase shift from 135 to 145GHz, with in-band RMS phase/gain errors of 1.27°-3.39° and 0.21-0.57 dB, and a fine 1-dB-step gain adjustment range of 7dB.