A Reliable Single-Event Burnout Hardening Method for p-GaN HEMTs: Utilizing Dual-Layer Buffer Structure

This work studies the mitigation effects of a double buffer layer structure on single-event burnout (SEB) based on a p-GaN gate GaN/AlGaN high electron mobility transistor. The structure forms a potential barrier between the GaN buffer layer and the GaN channel layer, and produces a quantum well between the two buffer layers. This design effectively delays the transmission of heavy particle induced charges and significantly improves the SEB tolerance of the device. Compared with the SEB threshold voltage of 250V for conventional p-GaN HEMT devices under Ta particle irradiation with LET = 0.6 pC/μm, the hardened design achieves a threshold of 460V. Experimental verification by wafer testing and tantalum heavy ion irradiation with an energy of 2006.4 MeV shows that the results are highly consistent with simulation predictions.