A Novel Asymmetrical-Parallelled LLC Resonant Converter for Light Load Efficiency Improvement

LLC resonant converters have been extensively applied in many applications due to their low switching loss and galvanic isolation features. However, the reduced efficiency under light load is an intrinsic problem for LLC converters. Enlightened by the architecture of the multicore processor, this article introduces an asymmetrical-paralleled LLC (APLLC) resonant converter architecture aiming at improving the light-load efficiency. It consists of multiple LLC units with different output characteristics in parallel, i.e., performance units (P-Units) and efficiency units (E-Units). The output power of each LLC unit can be actively adjusted according to optimized load conditions. The theoretical model of the proposed APLLC converter is given. The optimization of the power unit capacity and load power allocation strategy is demonstrated. Extensive experimental results are presented to validate that the proposed APLLC can significantly improve the light-load efficiency.