Leveraging Model-Driven Architecture for Efficient Custom Instruction Utilization in Embedded Systems in C and Rust

The push to support artificial intelligence in embedded systems introduces new challenges regarding software support of specialized hardware. The RISC-V instruction set architecture offers a promising platform for accelerators for said AI applications through custom instructions. Integrating these instructions into existing software codebases poses significant challenges, including manual adaptations and limited compiler support. This paper introduces a novel approach that generates hardware-optimized code utilizing custom instructions defined by a platform model. This method enhances the reusability of code and leverages design artifacts from the hardware design process to optimize the generated software in both C and Rust by generating intrinsic support for custom instructions through inline assembly. If the underlying platform does not allow the utilization of the specified custom instruction, an alternative implementation with optional global side effects is generated instead of the intrinsic. Thus, it expedites development by minimizing manual coding efforts and facilitates the seamless integration of hardware accelerators. An exemplary implementation of a matrix multiplication utilizing a custom multiply-accumulate instruction presented in this paper highlights the efficiency provided by this approach. Measurements based on this implementation show a reduction of the executed instructions by up to 75% while also achieving a 5-fold theoretical reduction in manual effort.