Performance Characterization of Trinetra-A HPC Network Using MPI Benchmarks

High-performance networks are critical to overall HPC system performance. Network hardware and its supporting software typically offer tunable parameters that can significantly impact application performance.This paper presents a performance characterization of Trinetra-A, a high-performance network developed by C-DAC. Trinetra-A supports two transport protocols: Single Fragment Queue (SFQ) using Programmed I/O (PIO), and EAGER using both PIO and Direct Memory Access (DMA). The impact of protocol switch thresholds is evaluated using heFFTe and MPI benchmarks. Results show that smaller thresholds (1 KB and 2 KB) deliver improved performance, reducing Allreduce latency across all message sizes and optimizing point-to-point communication in the 1-16 KB message range. The heFFTe benchmark demonstrates a 10% performance gain with smaller thresholds. These insights support effective tuning of MPI applications for Trinetra-A based systems.