Investigation of Interconnection Faults in Plastic SiP Modules: Failure Mechanisms and Reliability Insights

This study investigates interconnection faults in plastic system-in-package (SiP) modules, focusing on failure mechanisms and reliability challenges. Using dual-core control SiP modules comprising digital signal processor (DSP), synchronous dynamic random-access memory (SDRM), field-programmable gate array (FPGA), and flash chips interconnected via wire bonding and through-silicon via (TSV) structures, three failure modes—DSP Flash programming failure, general purpose input/ output (GPIO) test failure, and FPGA download failure were systematically analyzed. Through a suite of characterization techniques including X-ray inspection, scanning acoustic microscopy (SAM), lock-in thermography, and post-decapsulation analysis, mechanical cracking in wire bonds of FPGA, flash, and DSP chips was identified as the primary failure mechanism. These cracks were traced to stress induced by plastic molding process parameters, particularly injection press settings during encapsulation. The study underscores the critical role of manufacturing process control in ensuring SiP reliability, providing technical insights for defect localization and failure mitigation in high-reliability applications such as military systems, where unstable interconnection integrity remains a significant technological bottleneck.