Impact of Partial TMR on RISC-V Processor Reliability

Softcore processors on SRAM-based FPGAs are susceptible to radiation-induced faults with persistent effect due to FPGA characteristics. These faults are corrected via FPGA reconfiguration (scrubbing). Triple Modular Redundancy (TMR) and scrubbing are commonly used to mask and correct faults. However, TMR has a huge impact on area overhead. This work evaluates configurations of partial and full fine-grained distributed and coarse-grain TMR in RISC-V processors. The configurations explore the impact of using different numbers of voters and their locations on reliability, area, and performance. Results from fault injection and heavy-ion tests show how different configurations affect mean faults/fluence to failure.