An mm-Wave Full-Duplex Front End With Integrated LNA, PA, and Electrical Balance Duplexer

This article presents a 23–30-GHz front end for full-duplex (FD) communication. The front end achieves transmit–receive isolation using an electrical balance duplexer (EBD) that is integrated with a low noise amplifier (LNA) and a power amplifier (PA). The major contributions of this work include presenting a design-oriented approach to analyze EBD–PA cointegration, wherein the EBD is leveraged as part of the PA’s matching network. In addition, this work explores the challenges of achieving simultaneous EBD–PA matching, to maximize power delivery to the antenna, and EBD–antenna matching, to ensure a return loss (RL) greater than 10 dB at the antenna port. As will be demonstrated, reciprocal network constraints for PA matching network, depending on the PA’s output impedance and optimal load, may lead to a suboptimal PA operation to meet these simultaneous matching requirements. The presented EBD is tuned using a programmable balancing network that achieves over 40-dB TX–RX isolation across more than 300-MHz bandwidth, with a simulated IIP₃ of +56 dBm while accommodating antenna impedance variations within a 1.22:1 VSWR across the 23–30-GHz band. In addition, a measured isolation exceeding 30 dB over the bandwidth of operation is achieved using a real antenna with a VSWR of up to 1.5:1. The designed PA delivers a simulated output power of +16.5 dBm when loaded by ${Z}_{L\text {-Opt}}$ at 26 GHz in standalone operation. When integrated with the EBD using the proposed coil design methodology, the delivered power to the EBD’s TX port decreases by 1.3 dB to +15.2 dBm, reflecting the tradeoff associated with simultaneous EBD–PA and EBD–antenna matching. The simulated TX insertion loss (TXIL) of the EBD is 2.3–2.4 dB, and the measured power delivered to the antenna ranges from 11 to 12.9 dBm across the 23–30-GHz band. In the RX path comprising the EBD and LNA, a measured noise figure (NF) of <8.5 dB is achieved. Fabricated in GlobalFoundries 22-nm FDSOI CMOS, the chip occupies 2.36 mm² ( $1.98\times 1.19$ mm), inclusive of all pads.