Traffic Patterns in Networks-on-Chip: A Survey

Networks-on-chip (NoCs) widespread in computing system design are used in many applications. A critical NoC aspect is the interaction between computing cores and in particular the traffic patterns. The relevance of this work stems from the fact that traffic patterns in NoCs are poorly understood and have no general classification; and there are no universal generators and benchmarks for synthetic traffic patterns. The goal of the work is to investigate and classify the known data traffic patterns and find new possible patterns in communication between NoC cores. To achieve our goals, we compiled a detailed classification of synthetic and realistic traffic patterns in the form of a classification tree. The analysis of the existing benchmarks is done, and new specific benchmarks and traffic generation approaches for NoCs are provided. An analysis of existing benchmarks for NoCs and related areas was conducted. Based on the results of the analysis, we proposed two new synthetic benchmarks, as well as possible improvements and innovations for realistic benchmarks.