X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications

In this work, we present X-HEEP, an open-source, configurable, and extendible RISC-V platform for ultra-lowpower edge applications (TinyAI). X-HEEP features the eXtendible Accelerator InterFace (XAIF), which enables seamless integration of accelerators with varying requirements along with an extensive internal configuration of cores, memory, bus, and peripherals. Moreover, it supports various development flows, including FPGA prototyping, ASIC implementation, and mixed SystemC-RTL modeling, enabling efficient exploration and optimization. Implemented in TSMC’s 65 nm CMOS technology ($300 \mathrm{MHz}, 0.8 \mathrm{~V}$), X-HEEP achieves a minimal footprint of only $0.15 \mathrm{~mm}^{2}$ and consumes just $29 \mu \mathrm{~W}$ of leakage power. As a demonstrator of the configurability and low overhead of X-HEEP as a host platform, we present a study integrating it with near-memory accelerators targeting early-exit dynamic network applications, achieving up to $7.3 \times$ performance speedup and $3.6 \times$ energy improvement on the resulting heterogeneous system compared to CPU-only execution.