High Performance Soft Multi-Processor Arrays

In this paper we will explore the design and implementation of a multi-processor array consisting of a large number of soft parallel processors. We start with a new 16-SP 32-bit SIMT architecture that can run at 950MHz in Altera Agilex-7 devices. In one example, we create a 30 processor cluster that closes timing at over 930 MHz, and consumes only about 30% of a mid-range FPGA. This work is intended to enable the design of soft systems - where software and hardware approaches can be combined in an FPGA context.