Novel Arithmetic Circuits for Stochastic Computing in Unipolar Format

Stochastic Computing (SC) is a computational technique that executes arithmetic operations on a random bitstream basis. SC has several advantages over a traditional binary computing such as a reduction in hardware complexity, better tolerance to errors, and low power dissipation. The operations of stochastic arithmetic circuits are usually based on probability equations, however not all arithmetic operations can directly be generated from probability equations, for example a SC adder in which its result is scaled by half. This paper introduces a sequential processing technique to design SC arithmetic circuits in the unipolar encoding format. The proposed technique processes each bit of data in the input bitstream with the stored data, so the output bitstream can be easily generated. A SC comparator circuit, a SC adder, a SC subtractor and an SC absolute subtractor are proposed by using the proposed sequential processing technique. Different from the traditional SC adder and SC subtractor circuits in which their results are scaled by half, output bitstreams of the proposed method can be read without the needing of multiplying its result. A comparison between the proposed methods and other SC circuits is presented. The results in this paper show that the proposed designs are better than other SC arithmetic circuits found in the technical literature in terms of accuracy, crosscorrelation to input signal, area, performance, and power dissipation. For example, as a SC adder circuit, the proposed circuit improves performance by 28.76%, power dissipation by 38.6%, area by 28.95%, and power delay product (PDP) by 56.36% compared to the traditional SC adder circuit.