Innovative Monitoring Solution for 3D-ICs: Combining on-Chip Logic Analyzers with Software Stack in More Than Moore (MTM) Landscape

As the complexity of System on Chips (SoCs) continue to increase, there is a growing need for efficient development strategies that can navigate the challenges of integration beyond traditional Moore's law scaling. 3D-ICs (Three Dimensional Integrated Circuit) being one such solution is a promising technology, but there are certain challenges associated with it. While 3D-ICs become capable of handling complicated computing, huge memories become a necessity. Memories are prone to different failures starting from manufacturing defects to environmental stress like thermal stress. Elevated temperatures can cause different issues like increased error rates, data retention failures and even physical damage to the memory cells and interconnects. Detecting, notifying and acting upon notification of such failures at run-time to avoid fatal failure is need of the modern 3D-ICs era. While we do design any such systems, one should ensure that, it does not introduce an adverse impact on the performance. Conventional probing methods that are used to monitor the signals, in case of errors, often introduce signal distortion and noise, impeding accurate signal capture. This paper introduces a novel On-Chip Logic Analyzer (OCLA) specifically tailored for detection, monitoring and analysis of memory bus for various kinds of failures. By leveraging on chip logic analyzers, developers gain unprecedented insights into the intricate interactions within SoCs. This enables them to understand the full potential of the design. This paper also introduces an advanced Memory Monitoring and Analysis (MMA) software framework, which has been developed in order to notify and analyze the memory failures in real-time. It helps the user to get notified and take action whenever any catastrophic failure happens