Hardware-Software Co-Designed Embedded System for Efficient Image Processing

This research work is based on developing a real-time image processing system to detect edges of the image using the Sobel algorithm on Zybo Z7020 FPGA, applying the hardware-software co-design methodology. This system is able to process images in real-time on FPGA-based hardware which accelerates the overall process when coupled with the dedicated software application, which controls these hardware processes, significantly reduces the latency and power consumption thus making the system well suited to be used in embedded systems. Resultantly, the image processing system i.e. Sobel Edge Detection is designed in Verilog for FPGA hardware, whereas software handles the system control, including initialization and display output. The design, being modular, is scalable and easy to apply; the system works in real-time with low latency and low power consumption.