An Efficient Negative Capacitance-Based Voltage Amplifier Scheme with Enhanced Sensitivity and SNR Performance of Piezo-Sensor Systems

This paper presents an innovative interfacing scheme using a negative capacitance circuit to mitigate the effects of cable parasitic capacitance in piezoelectric sensor systems, specifically enhancing the sensitivity performance of piezopolymer sensors such as PVDF. Piezopolymer sensors are characterized by high voltage sensitivity but low charge sensitivity, making voltage amplifiers preferable for interfacing. However, when long cables are used to connect the sensor to the electronics, signal attenuation occurs, leading to significant sensitivity loss. The proposed solution introduces a negative capacitance circuit integrated with a voltage amplifier to counteract parasitic capacitance effects. This integration is achieved by incorporating a single feedback capacitor within a non-inverting voltage amplifier circuit, making the approach both effective and simple to implement. The negative capacitance circuit functions by simulating a negative capacitor that neutralizes the parasitic capacitance, ensuring signal integrity over long distances. The scheme has been simulated using LTspice and validated with a hardware prototype. Performance assessments demonstrate the scheme’s insensitivity to cable parasitic capacitance, maintaining signal quality even with a cable capacitance as high as 10,000 pF. Results indicate that sensor loading is improved by 11.6 dB when interfacing a piezoelectric sensor (Airmar, AT200) compared to a standard voltage amplifier configuration. This method offers a practical and efficient solution for applications requiring long cable connections without compromising sensor performance.