The VCR Effect in Active-RC Continuous-Time Sigma-Delta Modulators

Continuous-time sigma-delta modulators (CT-SDM) are used in many high-resolution applications, mostly in the audio band. The loop-filter of these modulators are usually realized with active-RC integrators, as these have a higher linearity compared to Gm-C integrators. In a thermal-noise limited design, the input resistors determine the signal-to-noise ratio of the CT-SDM. To minimize the silicon area, these resistors are typically implemented with high-resistivity polysilicon resistors. However, the effect of the voltage coefficient of resistance (VCR) affects the integration current, leading to harmonic distortion and a reduction in circuit performance. This paper addresses this effect by demonstrating, at a schematic level, the impact of varying the input resistance on the harmonic distortion of sigma-delta modulators. We show that one strategy to mitigate this effect in modulators with medium to high input voltages is to increase the silicon area of the input resistors. In this paper, three design cases are analyzed and measurement results of the VCR of three polysilicon resistors fabricated in a 130-nm BCD process are presented, and these results are in agreement with the simulation results.